|
|
|
SpiraTech, Novas Collaborate to Deliver Powerful Transaction-Based Debug Solution
OEM Agreement Combines SpiraTech's State-of-the-Art
Transaction Tools with Novas' Automated Debug Solutions to
Accelerate Understanding of ESL Designs
SAN JOSE, Calif.—(BUSINESS WIRE)—Feb. 28, 2005—
SpiraTech, Ltd., a pioneer in mixed abstraction verification, and
Novas Software, Inc., the leader in debug systems for complex chip
designs, today jointly announced they have entered into an OEM
agreement. SpiraTech's Cohesive(TM) technology will supply transaction
capture and generation technology for Novas' new nESL(TM) system debug
product. (See related February 28, 2005 release from Novas)
The Novas-SpiraTech collaboration will produce a highly automated
transaction-based debug solution. It will raise the visualisation and
understanding of complex on-chip communications structures to the
Electronic System Level (ESL) of abstraction. The result will be a
savings of many weeks of debug and analysis cycles for typical
system-on-chip (SoC) designs.
"ESL-based methodologies are finally revealing their true form,"
said Simon Calder, CEO of SpiraTech "They are becoming a coherent
collection of design automation and verification tools which embrace
the spectrum of abstraction, including the Transaction Levels. Our
joint development with Novas is evidence that it is possible to make
great RTL verification tools even better by enhancing them with more
automation and true ESL capabilities."
Novas will offer SpiraTech's technology within its nESL product to
automatically extract transaction information that inherently exists
within system and hardware design and verification environments.
Transactions will then be displayed both graphically and textually
within the Novas nESL environment for debug and analysis. This
visualisation can be performed dynamically during simulation using any
leading Hardware Description Language (HDL) or SystemC simulator, or
as a post-simulation function.
Transaction-based Debug Goes Mainstream
Visualising and debugging IC designs at the Transaction Level has
always been an attractive prospect for designers and verification
engineers, and is now becoming reality in mainstream SoC and complex
Application-Specific Integrated Circuit (ASIC) development. A
transaction is an abstract package of events that can represent
hundreds of lower level signal or register transfers. Since almost all
electronic design debug to date has been performed at the signal
level, much time is spent manually collating signal value changes into
the transactions of which they are constituents.
"Functional verification of large SoC designs is extremely
challenging with the tremendous amounts of data that must be tracked
and analyzed," said Dave Kelf, vice president of marketing at Novas.
"We are working with SpiraTech to streamline the process for capturing
and visualizing data at the higher transaction level. By leveraging
this powerful ESL technique, we can help accelerate SoC debug and
provide significant productivity gains for our end users."
This integration of SpiraTech's state-of-the art Cohesive
transaction tool with the Novas automated debug solutions will enable
designers to analyze cause-and-effect behaviors of ESL or RTL designs
for a wide variety of standard protocols, without the costly effort of
creating their own transaction extractors. By automating many of the
tasks involved, SpiraTech facilitated rapid development of the library
of protocol abstraction adaptors that will be offered with the Novas
nESL product. This approach will also enable the companies to provide
reliable support for proprietary protocols in a fraction of the time
required by any other means, saving their mutual customers multiple
man-years of internal engineering resources, as well as several months
of elapsed schedule time.
Price and Availability
The SpiraTech technology will be packaged as the nTE (Transaction
Extractor) option for the new nESL product from Novas. U.S. list
priced starting at $2,500 for one-year license, it provides a library
of 10 adaptors including AMBA AHB, AMBA AXI, PCI Express and OCP-IP.
Additionally, Novas will provide support for proprietary or other
non-standard protocols on a case-by-case basis.
About SpiraTech
SpiraTech is the leading provider of EDA tools that automate the
process of mixing and matching multiple levels of abstraction during
the design and verification of complex silicon devices. This ability
greatly enhances the productivity, applicability and accessibility of
the emerging generation of Electronic System Level (ESL) EDA tools.
SpiraTech is a privately owned, venture capital funded, company based
in Manchester, England.
About Novas
Novas Software, Inc. is the leading provider of robust,
tool-independent design debug systems to companies designing complex
ICs, embedded processing platforms and SoCs. Novas' products
dramatically reduce the time it takes for engineers to locate, isolate
and solve the root causes of functional design and verification
problems. Novas has been ranked first in customer satisfaction for
three consecutive years in a comprehensive EDA study published by CMP.
There are more than 12,000 Novas systems installed worldwide by over
400 companies and 40 companies utilizing Novas technology in their
products today. Novas is headquartered in San Jose, Calif. with
offices in Europe, Japan and Asia-Pacific. For more information, visit
www.novas.com or email info@novas.com.
Cohesive is a trademark of SpiraTech. All other trademarks or
registered trademarks are property of their respective owners.
Contact:
Wired Island, Ltd.
Public Relations for Novas
Laurie Stanley, 925-224-8762
laurie@wiredislandpr.com
or
Skye Marketing Communications, Ltd.
Public Relations for SpiraTech
Leslie Cumming, 415-285-2352
leslie@skyecommunications.com
|
|
|